1. Field of the Invention
This invention relates generally to the field of semiconductor device manufacturing and, more particularly, to a method and apparatus for detecting processing faults using scatterometry measurements.
2. Description of the Related Art
There is a constant drive within the semiconductor industry to increase the quality, reliability and throughput of integrated circuit devices, e.g., microprocessors, memory devices, and the like. This drive is fueled by consumer demands for higher quality computers and electronic devices that operate more reliably. These demands have resulted in a continual improvement in the manufacture of semiconductor devices, e.g., transistors, as well as in the manufacture of integrated circuit devices incorporating such transistors. Additionally, reducing the defects in the manufacture of the components of a typical transistor also lowers the overall cost per transistor as well as the cost of integrated circuit devices incorporating such transistors.
The technologies underlying semiconductor processing tools have attracted increased attention over the last several years, resulting in substantial refinements. However, despite the advances made in this area, many of the processing tools that are currently commercially available suffer certain deficiencies. In particular, such tools often lack advanced process data monitoring capabilities, such as the ability to provide historical parametric data in a user-friendly format, as well as event logging, real-time graphical display of both current processing parameters and the processing parameters of the entire run, and remote, i.e., local site and worldwide, monitoring. These deficiencies can engender nonoptimal control of critical processing parameters, such as throughput, accuracy, stability and repeatability, processing temperatures, mechanical tool parameters, and the like. This variability manifests itself as within-run disparities, run-to-run disparities and tool-to-tool disparities that can propagate into deviations in product quality and performance, whereas an ideal monitoring and diagnostics system for such tools would provide a means of monitoring this variability, as well as providing means for optimizing control of critical parameters.
Semiconductor devices are manufactured from wafers of a substrate material. Layers of materials are added, removed, and/or treated during fabrication to create the electrical circuits that make up the device. The fabrication essentially comprises four basic operations. Although there are only four basic operations, they can be combined in hundreds of different ways, depending upon the particular fabrication process.
The four operations typically used in the manufacture of semiconductor devices are:
layering, or adding thin layers of various materials to a wafer from which a semiconductor device is produced;
patterning, or removing selected portions of added layers;
doping, or placing specific amounts of dopants in the wafer surface through openings in the added layers; and
heat treatment, or heating and cooling the materials to produce desired effects in the processed wafer.
Occasionally, during the fabrication process, one or more process steps are omitted on a production wafer. Such omissions may be due to an error in the fabrication facility automated work flow system (e.g., a database or control script error), a tool failure, or an operator error. If the omitted process steps occur early during the fabrication process, it is not uncommon for the faulty wafer to undergo many subsequent steps prior to the faulty fabrication being identified. Often such identification occurs much further down the processing line, such as during the performance of electrical tests on the devices formed on the wafer. As a result, many resources, such as materials, tool time, operator time, etc., are wasted until the faulty fabrication can be identified.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
One aspect of the present invention is seen in a method for characterizing a misprocessed wafer. The method includes providing a wafer having a grating structure; illuminating at least a portion of the grating structure; measuring light reflected from the grating structure to generate a reflection profile; and characterizing a misprocessed condition of the wafer based on the reflection profile.
Another aspect of the present invention is seen in a metrology tool adapted to receive a wafer having a grating structure. The metrology tool includes a light source, a detector, and a data processing unit. The light source is adapted to illuminate at least a portion of the grating structure. The detector is adapted to measure light reflected from the grating structure to generate a reflection profile. The data processing unit is adapted to characterize a misprocessed condition of the wafer based on the reflection profile.